Method of and apparatus for interpolating digital signal, and apparatus for and methos of recording and/or playing back recording medium

ABSTRACT

An apparatus and method for interpolating a digital signal where an input data signal from a data input terminal 1 is supplied through a memory 2 to an FIR low-pass digital filter 4. The memory 2 is controlled by a control circuit 6 to supply data preceding and following data which have suffered an error to the digital filter 4 to extract values A, and B. The values A, and B are calculated by an interpolation data generating circuit 7 to generate a value Y0. The data preceding and following data which have suffered an error is supplied to the digital filter 4 to extract a value A0. To the value A0, there is added values Bn calculated in advance by supplying all interpolation data which the error portion can take to an arbitrary position of the digital filter 4. The sum is compared with the value Y0. Interpolation data is generated according to a value Bn at which the sum is closest to the value Y0, and interpolation data is delivered from a data selector 3 to a data output terminal 8. This arrangement is capable of interpolating a digital signal digitized in an arbitrary small number of bits.

TECHNICAL FIELD

The present invention relates to a method of and apparatus forinterpolating a digital signal, and more particularly to a method of andapparatus for interpolating a digital signal which has been digitizedwith a small number of bits.

BACKGROUND ART

Recording/playback mediums such as CDs (Compact Discs), DATs (DigitalAudio Tapes), etc. and digital audio broadcasting services such assatellite broadcasting services have heretofore been put to use as meansfor digitizing and transmitting audio signals (the term "transmission"used herein includes recording and reproduction of signals). In such adigital audio transmission apparatus, it has been customary to convertan analog signal into a digital signal according to a prescribed formatincluding a sampling frequency of 48 kHz, 44.1 kHz, or the like and anumber of quantizing bits such as 16 bits.

In the conventional digital audio transmission apparatus, the number ofquantizing bits for digital audio signals generally governs the dynamicrange of audio signals to be demodulated. For transmitting audio signalsof higher sound quality, therefore, it is necessary to expand the numberof quantizing bits from the current standard of 16 bits to 20 or 24bits. Once a format for signal transmission is determined, however,since the number of quantizing bits cannot easily be expanded, it is notpossible to produce audio signals of higher sound quality from thedigital audio transmission apparatus.

One process known as ΣΔ (sigma-delta) modulation for digitizing audiosignals has been proposed (see "AD/DA converter and digital filter" byYoshio Yamazaki, Japan Acoustic Society Journal Vol. 46, No. 3 (1990),pages 251-257).

FIG. 1 of the accompanying drawings shows an arrangement for 1-bit ΣΔmodulation. As shown in FIG. 1, an audio signal inputted from an inputterminal 91 is supplied through an adder 92 to an integrator 93, whichsupplies; an output signal to a comparator 94. The comparator 94compares the output signal from the integrator 93 with a midpointpotential of the inputted audio signal, and quantizes the output signalfrom the integrator 93 into a 1-bit quantized signal in each of samplingperiods. The frequency of the sampling periods (sampling frequency) is64 or 128 times the conventional sampling frequency of 48 kHz or 44.1kHz.

The quantized signal is supplied to a delay unit 95, which delays thequantized signal by one sampling period. The delayed signal is thensupplied through a 1-bit D/A converter 96 to the adder 92, which addsthe delayed signal to the audio signal inputted from the input terminal92. The quantized signal from the comparator 94 is also delivered to anoutput terminal 97. According to the above ΣΔ modulation, as alsoindicated by the literature referred to above, it is possible to obtaina digital audio signal having a wide dynamic range even with a fewnumber of 1 bits by sufficiently increasing the frequency of samplingperiods (sampling frequency).

If the transmission system for transmitting the above digital audiosignal suffers a failure, resulting in a signal loss, the reproduceddigital signal is fixed to a value of either "1" or "0". For the digitalaudio signal which is not processed, e.g., which is produced by thearrangement shown in FIG. 1, the successive values of "1" and "0"correspond respectively to a positive maximum value and a negativemaximum value of the demodulated signal. Therefore, in the event thatpart of the signal is lost while in the transmission system,maximum-level noise is produced at the lost part of the signal, tendingto break a monitor amplifier or speaker.

Accordingly in CDs, DATs, etc., a signal format is determined such thatthe successive values of "1" and "0" will become an intermediate valueof the demodulated signal. Therefore, no maximum-level noise is producedeven when the above signal loss occurs. An error-correcting code isincluded in a digital signal which is transmitted, thereby recoveringthe signal in a certain range even in the event of a signal loss.Furthermore, with respect to a signal loss beyond the capability of theerror-correcting code, the signal loss is interpolated using precedingand following data or the like, or data preceding the signal loss areheld, preventing the listener from a problem in hearing the reproducedsound.

For interpolating such a signal loss, a linear interpolation process asshown in FIG. 2 of the accompanying drawings, for example, is carriedout. As shown in FIG. 2, interpolation data Dn (n=an integer of 1˜N) aredetermined according to the following equation:

    Dn=A+n×(B-A)/N                                       (1)

where N is the number of lost data, A is the value of data preceding thelost data, and B is the value of data following the lost data.

FIG. 3 of the accompanying drawings shows an interpolating circuit forcarrying out the linear interpolation process described above. As shownin FIG. 3, a digital audio signal is supplied to a data input terminal81. The digital audio signal is supplied as an inputted data signal fromthe data input terminal 81 through a memory 82 to a calculating circuit84. An error-detecting signal indicative of whether the digital audiosignal supplied to the data input terminal 81 is correct or not issupplied to an error-correcting signal input terminal 85. Theerror-detecting signal from the error-correcting signal input terminal85 is supplied to a control circuit 86.

When the error-detecting signal is supplied to the error-correctingsignal input terminal 85, the control circuit 86 supplies a controlsignal to the memory 82 and the calculating circuit 84, which effectsthe linear interpolation process according to the above equation (1)using the data stored in the memory 82. Interpolation data produced bythe calculating circuit 84 are supplied to a data selector 83 which iscontrolled by the control signal from the control circuit 86. During aperiod in which the error-detecting signal is supplied, the dataselector 83 selects the interpolation data from the calculating circuit84 and delivers the interpolation data to a data output terminal 87.

In the ΣΔ modulation, since each data item has a long word length andcomprises 1-bit data, lost data cannot be interpolated using precedingand following data. One proposed solution may be to replace error datawith preceding data which have the same length as the error data (i.e.,to hold the preceding data), as shown in FIG. 4 of the accompanyingdrawings. The proposal, however, is not practical as it may sometimesproduce very large noise.

Data produced according to the ΣΔ modulation may be converted into asignal format for CDs, DATs, or the like using a decimation filter. Thisprocess allows data to be interpolated in the same manner as theconventional process or replaced with the preceding data which are held,preventing the listener from a problem in hearing the reproduced sound.According to this process, however, signals which are processed have thesame characteristics as those of signals for CDs, DATs, or the like, andfail to provide a wide frequency range and a wide dynamic range whichare features of ΣΔ signals.

The conventional apparatus and methods have no means for recovering ΣΔsignals through interpolation in the event that it is lost due to afailure of the transmission system. Consequently, it has been highlydifficult to use ΣΔ signals in the general transmission system.

The present invention has been made in view of the above problems. It isan object of the present invention to provide a method of and anapparatus for well interpolating error data of a digital signal whichhas been digitized with a small number of bits according to ΣΔmodulation or the like.

SUMMARY OF THE INVENTION

According to the present invention, a digital signal digitized in apredetermined small number of bits and containing an error portion issupplied, and interpolation data for the error portion are producedusing a value produced by supplying the digital signal in which theerror portion is at an arbitrary position and from which the errorportion is removed to an arbitrary digital filter, and a value producedby supplying all interpolation data which the error portion can take tothe arbitrary position of the digital filter. In this connection, thereare disclosed a method of and an apparatus for interpolating a digitalsignal, and an apparatus for and a method of recording and/or playingback a recording medium.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram of an arrangement for 1-bit ΣΔ modulation;

FIG. 2 is a diagram illustrative of a linear interpolation process;

FIG. 3 is a block diagram of a conventional apparatus for interpolatinga digital signal;

FIG. 4 is a diagram illustrative of a process of holding preceding data;

FIG. 5 is a diagram illustrative of a method of interpolating a digitalsignal according to a first embodiment of the present invention;

FIG. 6 is a diagram showing Table 1 illustrative of the method ofinterpolating a digital signal according to the first embodiment of thepresent invention;

FIG. 7 is a diagram showing Table 2 illustrative of the method ofinterpolating a digital signal according to the first embodiment of thepresent invention;

FIG. 8 is a diagram illustrative of the method of interpolating adigital signal according to the first embodiment of the presentinvention;

FIG. 9 is a block diagram of an apparatus for interpolating a digitalsignal according to the first embodiment of the present invention;

FIG. 10 is a diagram illustrative of a method of interpolating a digitalsignal according to a second embodiment of the present invention;

FIG. 11 is a block diagram of an apparatus for interpolating a digitalsignal according to the second embodiment of the present invention;

FIG. 12 is a diagram illustrative of a method of interpolating a digitalsignal according to a third embodiment of the present invention;

FIG. 13 is a diagram illustrative of the method of interpolating adigital signal according to the third embodiment of the presentinvention;

FIG. 14 is a diagram illustrative of the method of interpolating adigital signal according to the third embodiment of the presentinvention;

FIG. 15 is a block diagram illustrative of an apparatus forinterpolating a digital signal according to the third embodiment of thepresent invention;

FIG. 16 is a diagram illustrative of a method of interpolating a digitalsignal according to a fourth embodiment of the present invention;

FIG. 17 is a diagram illustrative of the method of interpolating adigital signal according to the fourth embodiment of the presentinvention;

FIG. 18 is a diagram showing a waveform of a 1-bit ΣΔ signal correctedby holding data which precede a 4-bit error that has occurred to the1-bit ΣΔ signal;

FIG. 19 is a diagram showing a waveform of a 1-bit signal corrected byan interpolation process according to the present invention after a4-bit error has occurred to the 1-bit ΣΔ signal;

FIG. 20 is a diagram showing a waveform of a 1-bit ΣΔ signal correctedby holding data which precede an 8-bit error that has occurred to the1-bit ΣΔ signal;

FIG. 21 is a diagram showing a waveform of a 1-bit ΣΔ signal correctedby an interpolation process according to the present invention after an8-bit error has occurred to the 1-bit ΣΔ signal;

FIG. 22 is a diagram illustrative of a method of interpolating a digitalsignal according to a fifth embodiment of the present invention;

FIG. 23 is a diagram illustrative of the method of interpolating adigital signal according to the fifth embodiment of the presentinvention;

FIG. 24 is a diagram illustrative of the method of interpolating adigital signal according to the fifth embodiment of the presentinvention;

FIG. 25 is a block diagram illustrative of the method of interpolating adigital signal according to the fifth embodiment of the presentinvention;

FIG. 26 is a block diagram illustrative of a method of interpolating adigital signal according to a sixth embodiment of the present invention;

FIG. 27 is a diagram illustrative of the method of interpolating adigital signal according to the sixth embodiment of the presentinvention;

FIG. 28 is a diagram illustrative of the method of interpolating adigital signal according to the sixth embodiment of the presentinvention;

FIG. 29 is a block diagram illustrative of a method of interpolating adigital signal according to a seventh embodiment of the presentinvention;

FIG. 30 is a block diagram illustrative of a method of interpolating adigital signal according to an eighth embodiment of the presentinvention;

FIG. 31 is a block diagram of an apparatus for recording and reproducinga digital signal according to an embodiment of the present invention;and

FIGS. 32A, 32B, and 32C are diagrams showing a signal format for theapparatus for recording and reproducing a digital signal according tothe present invention.

BEST MODE FOR CARRYING OUT THE INVENTION

A method of and an apparatus for interpolating a digital signalaccording to the present invention will hereinafter be described indetail below.

According to the present invention, a ΣΔ EA signal which has suffered anerror is interpolated in the form of a ΣΔ signal, and corrected intodata which will present no problems for the user to hear the soundreproduced therefrom. Specifically, a ΣΔ signal which has suffered anerror is predicted using a filter, and the error is interpolated usingthe predicted ΣΔ signal.

For example, if a ΣΔ signal comprising a train of data b0, b1, b2, . . ., bm is applied to an n-tap FIR low-pass filter having coefficients c0,c1, c2, . . . , cn-1, then the FIR filter produces an output signal Ynaccording to the following equation:

    Yn=c0*b0+c1*b1+c2*b2+ . . . +cn-1*bn-1.

If 4 bits (b0, b1, b2, b3) of a EA signal having a word length of 1suffer an error, the FIR filter produces an output signal Yn as follows:

    Yn=(cO*b0+c1*b1+c2*b2+c3*b3)+(c4*b4+ . . . +cn-1*bn-1).

Since the value of the first term (c0*b0+c1*b1+c2*b2+c3*b3) on theright-hand side of the above equation cannot be calculated because itsdata are lost, the second term (c4*b4+ . . . +cn-1*bn-1) of theright-hand side can be calculated because the values of data b4˜bn-1 areknown. If it is assumed that the second term of the righthand side has avalue of A0, then the above equation is expressed as follows:

    Y0=(c0*b0+c1*b1+c2*b2+c3*b3)+A0.

Similarly, after 1 sample, 2 samples, and 3 samples, the filter producesoutput signals as follows:

    Y1=(c1*b0+c2*b1+c3*b2+c4*b3)+A1,

    Y2=(c2*b0+c3*b1+c4*b2+c5*b3)+A2, and

    Y3=(c3*b0+c4*b1+c5*b2+c6*b3)+A3.

The value of Yn can be determined by linear interpolation according tothe equation:

    Yn=A+n*(B˜A)/N                                       (2)

where A is the value preceding the error, B is the value following theerror, and N represents samples as the distance between the values A, B,as with the above equation (1). Therefore, Yn is expressed as follows:

    (c0*b0+c1*b1+c2*b2+c3*b3)+A0=Y0,

    (c1*b0+c2*b1+c3*b2+c4*b3)+A1=Y1,

    (c2*b0+c3*b1+c4*b2+c5*b3)+A2=Y2, and

    (c3*b0+c4*b1+c5*b2+c6*b3)+A3=Y3.                           (3)

When the simultaneous equations (3) are solved for b0˜b3, the value ofthe lost data can be estimated.

Since the data word length of the data bn is actually 1 bit, the valueof the data bn can be only either "1" or "-1". On the other hand, thesolutions of the simultaneous equations (3) are of arbitrary valuesother than either "1" or "-1". Therefore, even if the value of the datais determined to be either "1" or "-1" based on the sign, for example,of the solutions of the simultaneous equations (3), the interpolated ΣΔsignal may possibly contain noise having a very large level.

Since as many such simultaneous equations as the number of taps of alow-pass filter can be generated by shifting samples, it may be possibleto establish simultaneous equations:

    c0*b0+c1*b1+c2*b2+c3*b3+A0=Y0,

    c1*b0+c2*b1+c3*b2+c4*b3+A1=Y,

    c2*b0+c3*b1+c4*b2+c5*b3+A2=Y2,

    c3*b0+c4*b1+c5*b2+c6*b3+A3=Y3,

    c4*b0+c5*b1+c6*b2+c7*b3+A4=Y4,

    c5*b0+c6*b1+c7*b2+c8*b3+A5=Y5,

    c6*b0+c7*b1+c8*b2+c9*b3+A6=Y6, and

    c7*b0+c8*b1+c9*b2+c1O*b3+A7=Y7,

and to determine appropriate solutions using the method of least squaresor the like. However, such a process results in complex calculations andis not practical.

According to a first embodiment of the present invention, the followingprocess is devised: In view of the fact that the data bn can only take avalue of either "1" or "-1", (c0*b0+c1*b1+c2*b2+c3*b3) on the left-handside of the equations (3) can only take a total of 16 values due to acombination of "1" and "-1" of the four data b0˜b3. All the 16 valuesare calculated in advance, and one of the 16 values is looked for whichmakes (c0*b0+c1*b1+c2*b2+c3*b3) closest to Y0.

In an actual example, it is assumed that 4-bit data (b0, b1, b2, b3) of1-bit data shown in Table 2 shown in FIG. 7 have suffered an error, andthe data are interpolated using Table 1 shown in FIG. 5 and a 29-tap FIRfilter shown in FIG. 6. The data shown in FIG. 7 represents by way ofexample a sine wave having a sampling frequency of 2.822 MHz, a signalfrequency of 1 kHz, and an amplitude which is of -50 dB from the fullscale. For carrying out the filter calculations according to theequations (3), the data which have suffered an error may be located inany phase of the FIR filter, but are assumed to be at the center of theFIR filter as shown in FIG. 8 for an easy understanding.

If terms which cannot be subject to filter calculations due to an errorare represented by Bn, then the terms Bn are expressed by:

    Bn=c12*b0+c13*b1+c14*b2+c15*b3.

If remaining terms which can be subject to filter calculations in theabsence of an error are represented by A0, then the terms A0 areexpressed by:

    A0=c0*b(-12)+c1*b(-11)+ . . . +c,1*b(-2)+c11*b(-1)+c16*b4+c17*b5+ . . . +c27*b15+c28*b16.

The equations (3) are now expressed by:

    Bn+A0=Y0.                                                  (4)

16 values of Bn where each of b0˜b3 takes values of "1" and "-1" arecalculated as follows:

    ______________________________________                                        When b0 = 1, b1 = 1, b2 = 1, b3 = 1,                                                             Bn = B0 = 1331.                                            When b0 = -1, b1 = 1, b2 = 1, b3 = 1,                                                            Bn = B1 = 701.                                             When b0 = 1, b1 = -1, b2 = 1, b3 = 1,                                                            Bn = B2 = 659.                                             When b0 = -1, b1 = -1, b2 = 1, b3 = 1,                                                           Bn = B3 = 29.                                              When b0 = 1, b1 = 1, b2 = -1, b3 = 1,                                                            Bn = B4 = 643.                                             When b0 = -1, b1 = 1, b2 = -1, b3 = 1,                                                           Bn = B5 = 13.                                              When b0 = 1, b1 = -1, b2 = -1, b3 = 1,                                                           Bn = B6 = -29.                                             When b0 = -1, b1 = -1, b2 = -1, b3 = 1,                                                          Bn = B7 = -659.                                            When b0 = 1, b1 = 1, b2 = 1, b3 = -1,                                                            Bn = B8 = 659.                                             When b0 = -1, b1 = 1, b2 = 1, b3 = -1,                                                           Bn = B9 = 29.                                              When b0 = 1, b1 = -1, b2 = 1, b3 = -1,                                                           Bn = B10 = -13.                                            When b0 = -1, b1 = -1, b2 = 1, b3 = -1,                                                          Bn = B11 = -643.                                           When b0 = 1, b1 = 1, b2 = -1, b3 = -1,                                                           Bn = B12 = -29.                                            When b0 = -1, b1 = 1, b2 = -1, b3 = -1,                                                          Bn = B13 = -659.                                           When b0 = 1, b1 = -1, b2 = -1, b3 = -1,                                                          Bn = B14 = -701.                                           When b0 = -1, b1 = -1, b2 = -1, b3 = -1,                                                         Bn = B14 = -1331.                                          ______________________________________                                    

Data portions with no error are subjected to filter calculations,resulting in:

    A0=-3.0.

The value A of a filter output signal preceding data which suffer anerror is indicated by:

    A=c0*b(-29)+c1*b(-28)+ . . . +c27*b(-2)+c28*b(-1)=12.0.

The value B of a filter output signal following data which suffer anerror is indicated by:

    B=c0*b4+c1*b5+ . . . +c27*b31+c28*b32=0.0

    N=29+4=33

    n=14.

Therefore, using the equation (2),

    Y0=A+n*(B-A)/N=12.0+14*(0.0-12.0)/33=6.9.

Therefore, at the respective instances of EBn,

    when Bn=B0, Bn+A0=1328,

    when Bn=B1, Bn+A0=698,

    when Bn=B2, Bn+A0=656,

    when Bn=B3, Bn+A0=26,

    when En=B4, En+A0=640,

    when Bn=B5, Bn+A0=10,

    when Bn=B6, Bn+A0=-32,

    when Bn=B7, Bn+A0=-662,

    when Bn=B8, Bn+A0=657,

    when Bn=B9, Bn+A0=26,

    when Bn=B10, Bn+A0=-16,

    when Bn=B11, Bn+A0=-646,

    when Bn=B12, Bn+A0=-32,

    when Bn=B13, Bn+A0=-662,

    when Bn=B14, Bn+A0=-704,

    when Bn=B15, Bn+A0=-1334.

Therefore, the value of B5+A0=10 which is closest to an interpolationtarget value of Y0=6.9, i.e.,

    B5: (b0=01, b1=1, b2=-1, b3=1)

is interpolation data which are to be determined. In this example, theinterpolation data are in agreement with the original data in Table 2shown in FIG. 7.

According to this method, when a digital signal which has been digitizedin an arbitrary small number of bits and contains an error portion issupplied, interpolation data of the error portion is obtained using avalue produced by supplying the data of the digital signal, in which theerror portion is at an arbitrary position and from which the errorportion is removed, to an arbitrary digital filter, and also a valueproduced by supplying all interpolation data, which the error portioncan have, to an arbitrary position of the digital filter. As a result,it is possible to obtain interpolation data approximating the originaldata, thereby well interpolating the digital signal.

The sum of the value produced by supplying the data of the digitalsignal, from which the error portion is removed, to the arbitrarydigital filter, and the value produced by supplying all interpolationdata, which the error portion can have, to the digital filter isdetermined. There is then determined a value at which the sumapproximates a value that has been calculated according to an arbitraryinterpolation formula from a value produced by supplying data of thedigital signal which precede and follow the error portion to the digitalfilter. Interpolation data is now obtained which correspond to thedetermined value. In this manner, the amount of calculations is reducedfor well interpolating the digital signal.

The above process may be carried out by an arrangement as shown in FIG.9. As shown in FIG. 9, a digital audio signal inputted from a data inputterminal 1 is supplied through a memory 2 to a data selector 3. Thedigital signal from the memory 2 is also supplied to an n-tap FIRlow-pass filter having coefficients c0, c1, c2, . . . , cn-1.

An error-detecting signal indicative of whether the digital audio signalsupplied to the data input terminal 1 is correct or not is supplied toan error-correcting signal input terminal 5. The error-detecting signalis supplied from an error-detecting circuit (not shown). Theerror-detecting circuit detects whether an error has occurred or notwhen it decodes an error-detecting code or an error-correcting codewhich is added to the digital audio signal supplied to the data inputterminal 1. The error-detecting signal supplied to the error-correctingsignal input terminal 5 is supplied to a control circuit 6. The controlcircuit 6 supplies a control signal to the memory 2, the data selector3, and an interpolation data generating circuit 7 (described later on).

When an error is detected in the digital audio signal supplied to thedata input terminal 1 and an error-detecting signal is supplied to theerror-correcting signal input terminal 5, the control circuit 6 suppliesa control signal to the memory 2, from which data preceding the datawhich have suffered the error are read and supplied to a digital filter4. The digital filter 4 extracts a value A preceding the data which havesuffered the error. The value A is held by a register 71 of theinterpolation data generating circuit 7.

Then, the control circuit 6 supplies a control signal to the memory 2,from which data following the data which have suffered the error areread and supplied to the digital filter 4. The value B is held by aregister 72 of the interpolation data generating circuit 7. Using thevalues A, B, the equation (2) is calculated by a calculating circuit 73,producing a value Y0.

The control signal from the control circuit 6 is supplied to the memory2, from which data preceding and following the data which have sufferedthe error, as shown in FIG. 8, are read and supplied to the digitalfilter 4. Since the above error is not generated, the value of a term A0capable of filter calculations is extracted from the digital filter 4,and held by a register 74 of the interpolation data generating circuit7.

A memory 75 of the interpolation data generating circuit 7 holds thevalues of terms Bn incapable of filter calculations due to the error.The values of terms Bn are successively read from the memory 75 andsupplied to an adder 76, which adds the supplied values of terms Bn tothe value of the term A0. The value of the sum is supplied to a decisioncircuit 77, which compares the supplied value of the sum with the valueY0 from the calculating circuit 73, and decides a value of Bn at whichthe supplied value of the sum is closest to the value Y0. Interpolationdata are produced according to the decided value of Bn.

The values of Bn are calculated in advance based on the configuration ofthe digital filter 4 that is used or the filter coefficients and theposition where an error is established, and are stored in a table. Theinterpolation data generating circuit 7 which is functionally shown as ablock in FIG. 9 is actually implemented by software.

The interpolation data from the interpolation data generating circuit 7is supplied to the data selector 3. The data selector 3 is controlled bythe control signal from the control circuit 6. During an interval inwhich an error-detecting signal is supplied to the error-detectingsignal input terminal 5, the data selector 3 selects the interpolationdata from the interpolation data generating circuit 7 and delivers theinterpolation data to a data output terminal 8.

The apparatus shown in FIG. 9 is supplied with a digital signal whichhas been digitized in an arbitrary small number of bits and contains anerror portion, and produces interpolation data of the error portionusing a value produced by supplying the data of the digital signal, inwhich the error portion is at an arbitrary position and from which theerror portion is removed, to an arbitrary digital filter, and also avalue produced by supplying all interpolation data, which the errorportion can have, to an arbitrary position of the digital filter. As aresult, it is possible to obtain interpolation data approximating theoriginal data, thereby well interpolating the digital signal.

In the method according to the first embodiment described above, if thenumber of lost data is small, e.g., 4 in the illustrated example, thenthe number of data calculated is also small, i.e., 16. However, if thelength of an error increases, then the amount of calculations neededincreases by a factor of the square of the length of the error.Accordingly, this method is not suitable for calculating the values ofall combinations of Bn+A0 thoroughly to determine a minimum value.

In a method according to a second embodiment of the present invention,possible 16 values of B0˜B15 are rearranged in order of magnitude asB'0˜B'15, and they are approximated to a straight line (interpolatingstraight line) having a gradient of "p" and a y-intercept of "q", usingthe method of least squares or the like.

Specifically, the approximate straight line is expressed by:

    B'=px+q

and substituted in Bn of the equation (4), producing:

    px+q+A0=Y0.

Therefore,

    x=(Y0-A0-q)/p. RE                                          (5)

Lost data can be determined from the value of an integer which isclosest to the solution to the equation (5).

An example which employs the same FIRZ filter as described above withrespect to the this method will be described below.

First, the terms Bn are rearranged in order of magnitude as follows:

    B'0=B0=1331

    B'1=B1=701

    B'2=B2=659

    B'3=B8=659

    B'4=B4=643

    B'5=B3=29

    B'6=B9=29

    B'7=B5=13

    B'8=B10=-13

    B'9=B6=-29

    B'10=B12=-29

    B'12=B11=-643

    B'12=B7=-659

    B'13=B13=-659

    B'14=B14=-701

    B'15=B15=-1331

A polygonal curve of B' is shown at "a" in FIG. 10. When the polygonalcurve is approximated to a straight line using the method of leastsquares, the straight line is expressed shown at "b" in FIG. 10 which isindicated by:

    B'=138.25×-1036.9.

Therefore, p=138.25 and q=-1036.9. The values of "p", "q" are calculatedin advance based on the configuration (coefficients) of the digitalfilter 4 that is used and the position where an error portion isestablished.

From the values of A0=-3.0 and Y0=6.9, using the equation (5),

    x=(6.9+3.0+1036.9)/138.25=7.56.

From B'(7.56)→B'(8)=B(10),

    B10: (b0=1, b1=-1, b2=1, b3=-1)

is finally obtained.

The above process will be described below with reference to FIG. 10. Apoint of intersection between the straight line "b" in FIG. 10 which hasbeen obtained using the method of least squares and a 0 level isdetermined, and a value corresponding or closest to a point on thehorizontal axis of FIG. 10 which corresponds to the point ofintersection between the straight line "b" and the 0 level is determinedas interpolation data. The determined interpolation data is inserted inor replace a portion of the digital signal where the error has occurred,thereby interpolating the digital signal. The interpolation datacorresponding to the point on the horizontal axis of FIG. 10 may bedetermined using a conversion table.

In this example, an FIR filter having a short tap length has beenemployed for the sake of brevity, and hence the result differs from theresult of the former method. However, the results of the two methods canbe brought into agreement with each other in most cases by increasingthe tape length of the FIR filter for higher calculation accuracy.

In the method according to the second embodiment, as described above, agraph is determined which approximates a value produced by supplying allinterpolation data, which an error portion can have, to an arbitraryposition of the digital filter. A value which approximates a point ofintersection between the determined graph and a 0 level is thendetermined, and interpolation data corresponding to the determined valueis obtained. In this manner, the amount of calculations needed isfurther reduced for well interpolating the digital signal.

The method according to the second embodiment may be carried out by anarrangement as shown in FIG. 11. Those parts shown in FIG. 11 which areidentical to those shown in FIG. 9 are denoted by identical referencenumerals, and will not be described in detail below. As shown in FIG.11, a value Y0 from the calculating circuit 73 of the interpolation datagenerating circuit 7 and a value of A0 held by the register 74 aresupplied to a calculating circuit 78 which calculates the equation (5),for thereby calculating B' described above. A value Bn closest to B' isdecided, and interpolation data is produced according to the decidedvalue Bn.

The interpolation data generated by the calculating circuit 78 of theinterpolation data generating circuit 7 are supplied to the dataselector 3. As with the arrangement shown in FIG. 9, during an intervalin which an error-detecting signal is supplied to the error-detectingsignal input terminal 5, the data selector 3 selects the interpolationdata from the interpolation data generating circuit 7 based on thecontrol signal from the control circuit 6. As a result, data outputterminal 8 outputs data in which the interpolation data from theinterpolation data generating circuit 7 has replaced or been inserted inthe error portion.

A method according to a third embodiment of the present invention is anapplication of the method according to the first embodiment, anddispenses with the calculation of Yn according to the equation (2).Specifically, since Y0, Y1, Y2, . . . are linearly interpolated, theirdifferences are constant as follows:

    Y0-Y1=Y1-Y2=k.

If it is assumed that

    Y0-Y1=(c0-c1)*b0+(c1-c2)*b1+(c2-c3)*b2+(c3-c4)*b3+A0-A1=k,

and

    C0=c0-c1,

A'0=A0-A1, then the following equation is satisfied:

    CO*b0+C1*b1+C2*b2+C3*b3+A'0=k.                             (6)

The equation (6) may be considered as an FIR filter which comprises adifferential filter whose coefficients are represented by thedifferences between the coefficients of the original low-pass filterthat are shifted by one coefficient position. Since Y0, Y1, Y2, . . .are linearly interpolated, the coefficients of the original low-passfilter may not be shifted by one coefficient position, but may beshifted by 1/2 of the tap length of the original FIR filter.

An example of the coefficients of the differential filter is illustratedin Table 3 shown in FIG. 12 and FIG. 13.

The equation (6) is of the same configuration as the equation (3). It ispossible to calculate A'0 using the differential filter shown in Table 3instead of the FIR filter shown in Table 1, and to determine "k" bycalculating the differential filter in the vicinity of an error regionas shown in FIG. 14.

As with the interpolation using the above FIR filter, data suffering anerror can be interpolated according to:

    x=(k-A'0-q)/p.                                             (7)

In the method according to the third embodiment, it is not necessary tocalculate Yn according to the equation (2).

In the method according to the third embodiment, a differential digitalfilter whose coefficients are represented by the differences between thecoefficients of an original filter that are shifted by an arbitrary taplength is used thereby to further reduce the amount of calculations forwell interpolating the digital signal.

The method according to the third embodiment may be carried out by anarrangement as shown in FIG. 15. Those parts shown in FIG. 15 which areidentical to those shown in FIG. 9 are denoted by identical referencenumerals, and will not be described in detail below. As shown in FIG.15, a data signal from the memory 2 is supplied to a differentialdigital filter 4' having coefficients C0, . . . , C40.

If an error is detected in a digital signal supplied to the data inputterminal 1 and an error-detecting signal is supplied to theerror-correcting signal input terminal 5, the control circuit 6 suppliesa control signal to the memory 2, from which data in the vicinity of thedata that has suffered the error is read and supplied to thedifferential digital filter 4'. The differential digital filter 4'extracts a value of "k" described above, which is then held by aregister 61 of an interpolation data generating circuit 7.

The control signal from the control circuit 6 is supplied to the memory2, from which data preceding and following the data that has sufferedthe error are read and supplied to the differential digital filter 4'.The differential digital filter 4' extracts a value of A'0 describedabove, which is held by a register 62 of the interpolation datagenerating circuit 7.

The value of "k" from the register 61 and the value of A'0 from theregister 62 are supplied to a calculating circuit 63, which calculates avalue of "x" according to the equation (7). A value of Bn which isclosest to the value of "x" is decided, and the decided value of Bn issupplied to a memory 64, for thereby generating interpolation data.During an interval in which the error-detecting signal is supplied tothe error-detecting signal input terminal 5, the interpolation datagenerated by the interpolation data generating circuit 7 are selected bythe data selector 3, and outputted from the output terminal 8.

The values of Bn are calculated in advance based on the configuration(coefficients) of the differential digital filter 4' that is used andthe position where an error is established, and are stored in a table.The interpolation data generating circuit 7 which is functionally shownas a block in FIG. 15 may be implemented by software.

The apparatus shown in FIG. 15 employs a differential digital filterwhose coefficients are represented by the differences between thecoefficients of an original filter that are shifted by an arbitrary taplength thereby to further reduce the amount of calculations for wellinterpolating the digital signal.

A method according to a fourth embodiment of the present inventioneffects calculations for interpolation, as described below, so that avalue of "k" will not be calculated. Since the differential coefficientfilter illustrated in the example is of a configuration of pointsymmetry, the same interpolating process as with the method according tothe third embodiment is carried out at two positions in point symmetryas shown in FIG. 16.

If an interpolating straight line has a gradient of "p" and ay-intercept of "q", then another interpolating straight line has agradient of "-p" and a y-intercept of "-q". From the respective straightlines are obtained:

    x=(k-A'0-q)/p, and

    x=(k-A'1+q)/(-p)

as with the equation (7). By eliminating "k" from the above equations,the following equation is obtained:

    x=(A'1-A'0-2q)/2p.                                         (8)

As shown in FIG. 17, data lost by an error is estimated from a point ofintersection between these two estimated straight lines, and dataclosest to the estimated data is outputted as interpolation data.

In the method according to the fourth embodiment, a graph is determinedwhich approximates a value produced by supplying all interpolation data,which an error portion can have, to an arbitrary position of thedifferential digital filter, and a first graph is determined bysubstituting, in the graph, a value produced by supplying the data ofthe digital signal, in which the error portion is at an arbitraryposition and from which the error portion is removed, to thedifferential digital filter. Furthermore, a graph is determined whichapproximates a value produced by supplying all interpolation data, whichan error portion can have, to a position of point symmetry of thedifferential digital filter at an arbitrary position of the differentialdigital filter, and a second graph is determined by substituting, in thegraph, a value produced by supplying the data of the digital signal, inwhich the error portion is at a position of point symmetry of thedifferential digital filter at an arbitrary position and from which theerror portion is removed, to the differential digital filter. A valuewhich approximates a point of intersection between the first and secondgraphs is decided, and interpolation data corresponding to the decidedvalue is obtained. In this manner, the amount of calculations needed isfurther reduced for properly interpolating the digital signal.

The method according to the fourth embodiment may be carried out by anarrangement which is the same as the arrangement shown in FIG. 15, forexample. Specifically, if an error is detected in a digital signalsupplied to the data input terminal 1 and an error-detecting signal issupplied to the error-correcting signal input terminal 5, the controlcircuit 6 supplies a control signal to memory 2, from which datapreceding and following the data are read in a phase to determine A'1shown in FIG. 16, for example, and supplied to the differential digitalfilter 4'. The differential digital filter 4' extracts a value of A'1described above, which is then held by the register 61 of theinterpolation data generating circuit 7.

The control signal from the control circuit 6 is supplied to the memory2, from which data preceding and following the data is read in a phaseto determine A'0 shown in FIG. 16, for example, and supplied to thedifferential digital filter 4'. The differential digital filter 4'extracts a value of A'0 described above, which is held by the register62 of the interpolation data generating circuit 7.

The value of A'1 from the register 61 and the value of A'0 from theregister 62 are supplied to the calculating circuit 63, which calculatesa value of "x" according to the equation (8). A value of Bn which isclosest to the value of "x" is decided, and the decided value of Bn issupplied to the memory 64, for thereby generating interpolation data.During an interval in which the error-detecting signal is supplied tothe error-detecting signal input terminal 5, the interpolation datagenerated by the interpolation data generating circuit 7 is selected bythe data selector 3, and outputted from the output terminal 8.

The above apparatus determines a graph which approximates a valueproduced by supplying all interpolation data, which an error portion canhave, to an arbitrary position of the differential digital filter, afirst graph by substituting, in the graph, a value produced by supplyingthe data of the digital signal, in which the error portion is at anarbitrary position and from which the error portion is removed, to thedifferential digital filter, and furthermore, a graph which approximatesa value produced by supplying all interpolation data, which an errorportion can have, to a position of point symmetry of the differentialdigital filter at an arbitrary position of the differential digitalfilter, and a second graph by substituting, in the graph, a valueproduced by supplying the data of the digital signal, in which the errorportion is at a position of point symmetry of the differential digitalfilter at an arbitrary position and from which the error portion isremoved, to the differential digital filter. The apparatus then decidesa value which approximates a point of intersection between the first andsecond graphs, and obtains interpolation data corresponding to thedecided value. In this manner, the apparatus can reduce the amount ofcalculations needed for properly interpolating the digital signal.

In any of the methods according to the equations (5), (7), and (8)described above, as many equations can be established as the tap lengthof the filter depending on the phase of the filter using a regionsuffering an error, in which filter calculations are to be carried out.After solutions are determined from a plurality of equations, a moreprobable interpolated value can be determined using the principle of amajority decision.

In the above description, the length of data which are lost by an erroris of 4 bits. According to this method, however, insofar as aninterpolating straight Line is determined in advance depending on thelength of an error, it is possible to interpolate error data with almostthe same amount of calculations.

The digital filter which has low-pass filter characteristics is capableof interpolating digital signals in a manner to better match the hearingsensation.

Actual examples of interpolation with respect to a sine wave having asampling frequency of 2.822 MHz, a signal frequency of 1 kHz, and anamplitude which is of -50 dB from the full scale are shown in FIGS.18-21. The filter used in these examples is an FIR low-pass filtercomprising an average moving filter with 64 taps in four overlappingstages.

FIG. 18 shows a waveform of a 1-bit ΣΔ signal corrected by holding datawhich precede a 4-bit error that has occurred to the 1-bit ΣΔ signal.

FIG. 19 shows a waveform of a 1-bit ΣΔ signal corrected by aninterpolation process according to the present invention after a 4-biterror has occurred to the 1-bit ΣΔ signal.

FIG. 20 shows a waveform of a 1-bit ΣΔ signal corrected by holding datawhich precede an 8-bit error that has occurred to the 1-bit ΣΔ signal.

FIG. 21 shows a waveform of a 1-bit ΣΔ signal corrected by aninterpolation process according to the present invention after an 8-biterror has occurred to the 1-bit ΣΔ signal.

In these examples, noise of a large level is prevented from beingproduced according to the present invention.

With the methods and apparatus according to the above embodiments of thepresent invention, even if a signal portion is lost from a digital audiosignal composed of a small number of bits, such as a 1-bit signalproduced by ΣΔ modulation, for example, due to a failure of thetransmission system, maximum-level noise is prevented from beingproduced at the lost signal portion.

Accordingly, a digital audio signal composed of a small number of bits,such as a 1-bit signal produced by ΣΔ modulation, for example, can betransmitted (recorded and reproduced) without damage to itscharacteristics.

A method of interpolating a digital signal according to a fifthembodiment of the present invention will be described below.

In the method according to the fifth embodiment, a ΣΔ signal which hassuffered an error is interpolated in the form of a ΣΔ signal to restoredata which will present no problems for the listener to hear thereproduced sound. Specifically, a digital signal which has beendigitized in an arbitrary small number of bits is divided into digitalsignals each having a predetermined number of bits, and the probabilitythat the divided digital signals will be generated is determined. Basedon the determined probability, an interpolation table required for aninterpolation process is generated, and interpolation data of an errorportion are produced by referring to the interpolation table.

It is assumed that the data of a 1-bit ΣΔ signal are represented byb(n), b(n+1), b(n+2), b(n+3), b(n+4), . . . , and this signal is dividedby 4 bits from an arbitrary position into:

    B0=b(n)*23+b(n+1)*2.sup.2 +b(n+2)*2+b(n+3), and

    B1=b(n+4)*2.sup.3 +b(n+5)*2.sup.2 +b(n+6)*2+b(n+7),

for example.

If 4 bits of the ΣΔ signal are (0, 1, 1, 0), then it may be expressedby:

    B0=0*2w+1*22+1*2+0=6

which is calculated according to the hexadecimal notation. In thismanner, the above 4-bit ΣΔ signal can be converted into 16 values(symbols) ranging from "0" to "f" according to the hexadecimalrepresentation.

That is, the ΣΔ signal can be expressed by:

    0=(0, 0, 0, 0) 8=(1, 0, 0, 0)

    1=(0, 0, 0, 1) 9=(1, 0, 0, 1)

    2=(0, 0, 1, 0) a=(1, O, 1, 0)

    3=(0, 0, 1, 1) b=(1, 0, 1, 1)

    4=(0, 1, 0, 0) c=(1, 1, 0, 0)

    5=(0, 1, 0, 1) d=(1, 1, 0, 1)

    6=(0, 1, 1, 0) e=(1, 1, 1, 0)

    7=(0, 1, 1, 1) f=(1, 1, 1, 1).

An example of hexadecimal representations of the data of a ΣΔ signalproduced when an actual music signal is inputted is illustrated in Table4 shown in FIG. 22.

As can be seen from Table 4, the data of a ΣΔ signal produced when anactual music signal is inputted contain almost no data of "0" and "f",but mostly data of "5", "a", "6", and "c". This is because the ΣΔ signalexpresses the original music signal with the density of 1-bit values of"1" and "0", and the data of "0" and "f" correspond to negative andpositive maximum levels which do not often appear in the actual musicsignal.

If the ΣΔ signal represents a music signal, then there appears to be acorrelation between symbols of the ΣΔ signal. An examination of theprobability that two successive symbols (trains of symbols) will begenerated indicates that the symbols have a distribution as illustratedin Table 5 shown in FIG. 23.

Table 5 can be interpreted to indicate the probability of a transitionfrom a certain symbol to a certain symbol. For example, after a symbol"1", a symbol "a" appears with a probability of 50%, and a symbol "c"appears with a probability of 31%.

The application of the above concept to interpolating data which arelost due to noise or an error in a data transmission circuit signifiesthat if a symbol preceding a lost symbol is known, the lost symbol canbe estimated to a certain degree from the transition probability of theknown symbol. In the above example, if a symbol preceding a lost symbolis "1", then a symbol which comes after the symbol of "1" is consideredto be "a" of a highest probability, and can be used as interpolatingdata.

Based on the occurrence probability shown in Table 5, an interpolationtable can be created by gathering a symbol of a highest probabilitywhich are generated immediately after a symbol. With respect to all thesymbols having an occurrence probability of "0" in Table 5, "5" and "a"indicative of "0" for the ΣΔ signal may be used as interpolation data.An example of such interpolation data is illustrated in Table 6 shown inFIG. 24.

In FIG. 25, a digital audio signal supplied to a data input terminal 101is supplied to a delay circuit 102 having a delay time corresponding to4 bits of a train of data. A digital signal from the delay circuit 102is supplied to a data selector 103.

The digital signal from the data input terminal 101 is supplied to amemory 104 which successively stores 4-bit digital signals. The 4-bitdigital signals stored in the memory 104 are supplied to a ROM table 105which contains the interpolation data in Table 6. The digital signalsfrom the ROM table 105 are successively supplied to the data selector103.

An error-detecting signal indicative of whether the digital audio signalsupplied to the data input terminal 101 is correct or not is suppliedfrom an error-detecting circuit (not shown) to an error-correctingsignal input terminal 106. The error-detecting circuit detects whetheran error has occurred or not based on an error-detecting which is addedto the digital audio signal, when it decodes the digital audio signal.The error-detecting signal from the error-correcting signal inputterminal 106 is supplied to a control circuit 107. The control circuit107 supplies a control signal to the data selector 103 and the memory104.

When an error is detected in the digital audio signal supplied to thedata input terminal 101 and an error-detecting signal is supplied to theerror-correcting signal input terminal 106, the control circuit 107supplies a control signal to the memory 104, which holds 4 bitspreceding the digital signal which has suffered the error.

The 4 bits are supplied to the ROM table 105, in which the aboveinterpolation table is referred to, generating interpolation data. Theinterpolation data from the ROM 105 are supplied to the data selector103, which is controlled by the control signal from the control circuit107.

Therefore, when an error-detecting signal is supplied to theerror-correcting signal input terminal 106, 4 bits preceding the errorare held by the memory 104. Then, interpolation data are generated bythe ROM table 105 based on the 4 bits, and selected by the data selector103 and outputted to a data output terminal 108.

Consequently, if an error occurs to a digital signal which has beendigitized in an arbitrary small number of bits by ΣΔ modulation or thelike, then the apparatus shown in FIG. 25 divides the digital signalinto digital signals each having a predetermined number of bits,determines the probability that the divided digital signals will begenerated, generates an interpolation table required for aninterpolation process based on the determined probability, and producesinterpolation data of the error portion by referring to theinterpolation table. Therefore, it is possible to obtain interpolationdata that are mostly likely to be originally present in the errorportion. The digital signal can thus be interpolated very well with asimple arrangement.

The above apparatus for interpolating a digital signal which has beendigitized in a given small number of bits has an interpolation tablegenerated based on the occurrence probability of digital signals eachhaving an arbitrary number of bits, divided from a digital signal, meansfor referring to the interpolation table to obtain interpolation data ofan error portion of the digital signal if the digital signal suffers anerror, and means for replacing the error portion of the digital signalwith the interpolation data obtained from the interpolation table andoutputting the digital data. The apparatus is thus of a simplearrangement for interpolating the digital signal very well.

In the above description and the fifth embodiment, interpolation dataare determined from 4 bits (1 symbol) preceding an error portion.However, more accurate interpolation data may be obtained by consideringdata following the error portion as well as the data preceding the errorportion. Much more accurate interpolation data may be obtained by takinginto consideration data of 8 bits (2 symbols) preceding and followingthe error portion.

FIG. 26 shows an arrangement according to a sixth embodiment forobtaining interpolation data by taking into consideration data of 8 bits(2 symbols) preceding and following the error portion. Those parts shownin FIG. 26 which are identical to those shown in FIG. 25 are denoted byidentical reference numerals, and will not be described in detail below.

In FIG. 26, the 4-bit memory 104 shown in FIG. 25 is replaced with two8-bit memories 104a, 104b. First, the memory 104a is supplied with acontrol signal from the control circuit 107 for holding 8 bits precedingan error portion. After elapse of a time corresponding to 8 bits afterthe end of the error portion, the memory 104b is supplied with a controlsignal from the control circuit 107 for holding 8 bits following theerror portion.

A ROM table 105x contains an interpolation table generated from a totalof 16 bits including the 8 bits preceding and following the errorportion. Interpolation data generated by the ROM table 105x are suppliedto the data selector 103, which is controlled by a control signal fromthe control circuit 107. The delay circuit 102 has a delay timecorresponding to 12 bits of a train of data, for example.

In this manner, interpolation data of 4 bits, (1 symbol) can be obtainedby considering the data of 8 bits (2 symbols) preceding and followingthe error portion.

If an interpolation table is created from the train of data (16 bits intotal) composed of 8 bits preceding and following the error portion,then the size of the interpolation table is 2¹⁶ =65536. Since theinterpolation table contains trains of data which are substantially notgenerated in an actual ΣΔ signal, no table is created for such datatrains, but interpolation data of "5" or "a" are given as is the casewith the above data of 4 bits, thereby reducing the size of a table usedin actual circuits.

An example of a waveform which was actually interpolated by the methodaccording to the sixth embodiment is shown in FIG. 28. The signal shownin FIG. 28 represents data of a sine wave sampled at 2.822 MHz with 1and having an amplitude which is of -50 dB from the full scale, the sinewave being subjected to 4-bit errors at constant intervals. FIG. 27shows a waveform corrected by the conventional method of holding valuespreceding the errors. FIG. 28 shows the waveform interpolated using 8bits preceding and following the errors according to the sixthembodiment of the present invention. A comparison of the waveforms shownin FIGS. 27 and 28 clearly shows that high-level noise is prevented frombeing produced by the method according to the present invention.

In the above description and the fifth embodiment, 4-bit data areinterpolated as a 1 symbol. However, the length of data to beinterpolated is not limited to 4 bits, but may be of another value aswith the sixth embodiment. Data of a different length can similarly beinterpolated by generating an interpolation table corresponding to thedifferent length.

In the above description and the fifth and sixth embodiments, aninterpolation table is created based on data of a ΣΔ signal producedwhen a music signal shown in Table 4 above is inputted. However,different data may possibly be produced when a signal representative ofa recorded conversation or the like is inputted. Consequently,interpolation tables corresponding to the respective types of originalsignals of digital signals may be generated, and may be switcheddepending on the type of an original signal which is actually inputted.A seventh embodiment directed to such different interpolation tableswill be described below with reference to FIG. 29. Those parts shown inFIG. 29 which are identical to those shown in FIG. 25 are denoted byidentical reference numerals.

In FIG. 29, ROM tables 105a, 105b store interpolation tables generatedaccording to the fifth embodiment based on the data of ΣΔ signals ofdifferent types. For example, the ROM tables 105a, 105b storeinterpolation tables corresponding to digital audio data based ondifferent types of music information such as classical music, jazz, etc.

When an error-detecting signal is inputted to the error-detecting signalinput terminal 106, the control circuit 107 controls the memory 104 tostore data of a predetermined number of bits, e.g., data of 4 bits,preceding an error in a digital signal. The data stored in the memory104 are supplied to the ROM tables 105a, 105b. From the data supplied tothe ROM tables 105a, 105b, interpolation data are generated based on theinterpolation tables stored in the ROM tables 105a, 105b.

The interpolation data outputted from the ROM tables 105a, 105b aresupplied to a data selector 109. Based on a type decision signalsupplied to an input terminal 110, the data selector 109 selects eitherthe interpolation data outputted from the ROM table 105a or theinterpolation data outputted from the ROM table 105b, and supplies theselected interpolation data to the data selector 103.

The digital signal inputted to the input terminal 101 containsadditional information indicative of the type of the signal, e.g.,information indicative of a music genre such as classical music or jazz,if the digital signal is a digital audio signal. The type decisionsignal represents a determined result of the information indicative ofthe type of the signal which is determined by a decision means (notshown).

During an interval in which no error is generated, the output terminal108 outputs data based on a digital signal delayed by the delay circuit102. During an interval in which an error is occurring, the outputterminal 108 outputs the interpolation data selected by the dataselector 109.

With the arrangement shown in FIG. 29, an interpolation table dependingon the type of an original signal of a digital signal is selected forproducing optimum interpolation data depending on the type of theoriginal signal.

An eighth embodiment of the present invention will be described belowwith reference to FIG. 30. Those parts shown in FIG. 30 which areidentical to those shown in FIG. 25 are denoted by identical referencenumerals.

According to the eighth embodiment shown in FIG. 30, an interpolationtable is generated according to a supplied digital signal. In FIG. 30, adigital signal from the data input terminal 101 is supplied to the delaycircuit 102 and the memory 104, and also to a calculating circuit 111which determines the occurrence probability of the digital signal.According to the occurrence probability, an interpolation table iscreated and written in a storage unit 105y which comprises a RAM, forexample.

In FIG. 30, while an error is not being detected by the error-detectingcircuit (not shown), a digital audio signal inputted to the data inputterminal 101 is outputted through the delay circuit 102 and the dataselector 103 from the data output terminal 108. With no error beingdetected, a calculating circuit 111 calculates the occurrenceprobability of the data of the digital audio signal inputted from thedata input terminal 101 to generate an interpolation table, based on acontrol signal from the control circuit 107. The interpolation table iswritten in the storage unit 105y.

Thereafter, when an error is detected by the error-detecting circuit andan error-detecting signal is supplied -through the error-detectingsignal input terminal 106 to the control circuit 107, 4-bit datapreceding the error, for example, are supplied to the memory 104. Thedata read from the memory 104 are supplied to the storage unit 105y, andinterpolation data are generated based on the interpolation table in thestorage unit 105y and supplied to the data selector 103.

Since the data selector 103 has been switched to output theinterpolation data from the storage unit 105y based on the controlsignal from the control circuit 107, the interpolation data is replacedor is inserted in the error portion of the data of the digital audiosignal inputted from the data input terminal 101, and then the digitalaudio signal is outputted from the data output terminal 108. Thecalculating circuit 111 may not calculate the occurrence probability asshown in Table 5, but may count patterns of preceding and followingsymbols of the inputted digital audio signal.

In this manner, a interpolation table is generated depending on asupplied digital signal to obtain optimum interpolation data dependingon the digital signal.

The method of and the apparatus for interpolating a digital signalaccording to the present invention are preferably used in thetransmission (recording and reproducing) of a digital signal, forexample.

Specifically, for transmitting (recording and reproducing) a digitalsignal, the digital signal is divided into digital signals each having apredetermined number of bits, and a synchronizing signal and anerror-correcting code are added to each of the divided digital signalsfor transmission. FIG. 31 shows an apparatus for recording andreproducing such a digital signal. Those parts shown in FIG. 31 whichare identical to those shown in FIG. 25 are denoted by identicalreference numerals.

In FIG. 31, an inputted audio signal from an input terminal 121 issupplied through an adder 122 to an integrator 123. A signal from theintegrator 123 is supplied to a comparator 124, which compares thesupplied signal with a midpoint potential of the inputted audio signal,and quantizes the supplied signal into a 1-bit quantized signal in eachof sampling periods. The frequency of the sampling periods (samplingfrequency) is 64 or 128 times the conventional sampling frequency of 48kHz or 44.1 kHz.

The quantized signal is supplied to a delay unit 125, which delays thequantized signal by one sampling period. The delayed signal is thensupplied through a 1-bit D/A converter 126 to the adder 122, which addsthe delayed signal to the audio signal inputted from the input terminal121. The comparator 124 outputs a quantized signal representative of theinputted audio signal as it is subjected to ΣΔ modulation. The quantizedsignal outputted from the comparator 124 is supplied to an addingcircuit 127 which adds a synchronizing signal and an error-correctingcode (ECC) to a quantized signal per predetermined number of samples.The quantized signal to which the synchronizing signal and theerror-correcting code are added is supplied to a recording head 128,which records the quantized signal on a magnetic tape 129 as a recordingmedium.

FIGS. 32A˜32C show a signal format for a signal recorded on therecording medium (magnetic tape) 129. A digital signal is divided intodata symbols D₀ D₁ D₂ . . . with 4 bits (b₀, b₁, b₂ b₃) constituting onedata symbol D₀, as shown in FIG. 32A. As shown in FIG. 32B, 12 datablocks D₀ ˜D₁₁, for example, are grouped together as one block, andsynchronizing signals S₀ ˜S₃ and error-correcting codes P₀ ˜P₃ are addedto each of such blocks.

The apparatus thus allows a transmission error produced while a signalis being recorded or reproduced to be detected and corrected. Therecording and reproducing apparatus may interleave or otherwise processdata in order to provide sufficiently against a burst error generated onthe magnetic tape.

The signal recorded on the magnetic tape 129 is reproduced by a playbackhead 130. The reproduced signal is supplied to a synchronizing signalseparator and an error-correcting circuit 131, which effects an errorcorrection using the error-correcting codes P₀ ˜P₃ to obtain areproduced digital signal. If no error correction is possible, then thesynchronizing signal separator and an error-correcting circuit 131generates an error-detecting signal as described above.

The reproduced digital signal is supplied to the delay circuit 102 andthe memory 104, and the generated error-detecting signal is supplied tothe control circuit 107. When the error-detecting signal is supplied tothe control circuit 107, the control circuit 107 supplies a controlsignal to the memory 104, which holds 4 bits preceding a digital signalthat has suffered the error. The 4 bits are supplied to the ROM table105 to generate interpolation data. The interpolation data from the ROMtable 105 are supplied to the data selector 103, which selects theinterpolation data when the error-detecting signal is supplied. Theinterpolation data are now delivered to the data output terminal 108.

In this manner, an inputted audio signal is subjected to ΣΔ modulationand recorded, and a recorded digital audio signal is error-corrected. Ifsuch error correction is not possible, the digital signal isinterpolated and reproduced.

Since a digital signal to be recorded or reproduced is divided intodigital signals each of a predetermined number of bits, e.g., 4 bits,and an error is corrected in each of the divided digital signals, anerror portion is generated in each of the divided digital signals.Therefore, an interpolation process can be carried out in each of thedivided digital signals, and an interpolation table can be created in amanner to match each of the divided digital signals. As a result, a goodinterpolation process can be carried out with a simple arrangement.

With the above methods and apparatus, even if a signal portion is lostfrom a digital audio signal composed of a small number of bits, such asa 1-bit signal produced by ΣΔ modulation, for example, due to a failureof the transmission system, maximum-level noise is prevented from beingproduced at the lost signal portion.

Consequently, with the above methods and apparatus according to thepresent invention, a digital audio signal composed of a small number ofbits, such as a 1-bit signal produced by ΣΔ modulation, for example, canbe transmitted (recorded and reproduced) without damage to itscharacteristics. While the present invention has been described withrespect to an interpolation process effected on 1-bit data that havebeen subjected to ΣΔ modulation, the present invention is alsoapplicable to 4-bit data that have been subjected to ΣΔ modulation. Itshould be noted that various modifications can be made in the presentinvention without departing from the spirit of the present invention.

I claim:
 1. A method for interpolating a digital signal, comprising thesteps of:supplying said digital signal digitized in a predeterminedsmall number of bits to a digital filter; generating interpolation datafor interpolating an error portion of said digital signal from a valueproduced by supplying a portion of said digital signal other than saiderror portion to said digital filter and a value produced by supplyingsaid error portion to said digital filter; and interpolating said errorportion with said interpolation data.
 2. The method according to claim1, wherein the step of generating interpolation data includes generatingsaid interpolation data by effecting calculations using a value producedby supplying a portion preceding said error portion of said digitalsignal and a portion following said error portion of said digital signalto said digital filter, and a value produced by supplying said errorportion of said digital signal to said digital filter.
 3. The methodaccording to claim 2, further comprising the step of outputting as saidinterpolation data data corresponding to an approximated value based ona result of calculations effected using a value produced by supplying aportion preceding said error portion of said digital signal and aportion following said error portion of said digital signal to saiddigital filter, and a value produced by supplying said error portion ofsaid digital signal to said digital filter.
 4. The method according toclaim 2, further comprising the steps of:determining a sum of a valueproduced by supplying a portion of said digital signal other than saiderror portion of said digital signal to the digital filter and a valueproduced by supplying all available interpolation data to interpolatesaid error portion of said digital signal to said digital filter;determining a value at which said value of said sum approximates a valueproduced by calculations using a value produced by supplying a portionpreceding said error portion of said digital signal and a portionfollowing said error portion of said digital signal to said digitalfilter, and a value produced by supplying said error portion of saiddigital signal to said digital filter; and outputting as saidinterpolation data said approximated value.
 5. The method according toclaim 1, further comprising the steps of:determining a straight lineapproximating a value produced by supplying all available interpolationdata to interpolate said error portion of said digital signal to saiddigital filter; deciding a value approximating a point of intersectionbetween said determined straight line and a 0 level; and outputting saiddecided value as said interpolation data.
 6. The method according toclaim 1, comprising the further step of selecting said digital filter tohave low-pass filter characteristics.
 7. The method according to claim1, comprising the further step of selecting said digital filter to be adifferential digital filter whose coefficients are represented bydifferences between the coefficients of an original filter shifted by anarbitrary tap length.
 8. The method according to claim 7, furtherincluding the steps of:determining a first graph approximating a valueproduced by supplying all available interpolation data to interpolatesaid error portion of said digital signal to an arbitrary position ofsaid differential digital filter; determining a second graph bysubstituting in said first graph a value produced by supplying data ofsaid digital signal in which said error portion is at an arbitraryposition and from which the error portion is removed to saiddifferential digital filter; determining a third graph approximating avalue produced by supplying all available interpolation data tointerpolate said error portion to a position of point symmetry of saiddifferential digital filter at an arbitrary position of saiddifferential digital filter; determining a fourth graph by substitutingin said third graph a value produced by supplying said error portion ofsaid digital signal to said differential digital filter at saidarbitrary position; deciding a value approximating a point ofintersection between said third graph and said fourth graph; andproducing said interpolation data to correspond to said decided value.9. The method according to claim 1, further comprising the step ofmodulating said digital signal according to ΣΔ modulation.
 10. Anapparatus for interpolating a digital signal, comprising:a digitalfilter supplied with said digital signal digitized in a predeterminednumber of bits; generating means for generating interpolation data basedon an output signal produced from said digital filter by supplying aportion of said digital signal other than an error portion of saiddigital signal to said digital filter and an output signal produced fromsaid digital signal by supplying said error portion of the digitalsignal to the digital filter; and output means for interpolating saiderror portion of said digital signal with said interpolation datagenerated by said generating means.
 11. The apparatus according to claim10, wherein said generating means includes:first holding means forholding a value produced by supplying a portion of said digital signalpreceding said error portion of said digital signal and a portion ofsaid digital signal following said error portion to said digital filter;second holding means for holding a value produced by supplying saiderror portion of said digital signal to said digital filter; andcalculating means for generating said interpolation data by carrying outcalculations using output signals from said first holding means and saidsecond holding means.
 12. The apparatus according to claim 10, whereinsaid generating means includes:first holding means for holding a valueproduced by supplying a portion of said digital signal preceding saiderror portion of said digital signal and a portion of said digitalsignal following said error portion to said digital filter; secondholding means for holding a value produced by supplying said errorportion of said digital signal to said digital filter; and calculatingmeans for carrying out calculations and generating results using outputsignals from said first and said second holding means and generatingsaid interpolation data based on an approximate value of said results ofsaid calculations.
 13. The apparatus according to claim 12, wherein saidcalculating means includes:means for determining a sum of a valueproduced by supplying a portion of said digital signal other than saiderror portion of said digital signal to the digital filter and a valueproduced by supplying all interpolation data which can be taken tointerpolate said error portion of said digital signal to said digitalfilter; means for determining a value at which said value of said sumapproximates a value produced by calculations using a value produced bysupplying a portion preceding said error portion of said digital signaland a portion following said error portion of said digital signal tosaid digital filter, and a value produced by supplying said errorportion of said digital signal to said digital filter; and outputting assaid interpolation data said approximated value.
 14. The apparatusaccording to claim 10, wherein said generating meansincludes:calculating means for determining a straight line approximatinga value produced by supplying all available interpolation data tointerpolate said error portion of said digital signal to said digitalfilter, wherein said calculating means decides a value approximating apoint of intersection between said determined straight line and a 0level, and outputs said decided value as said interpolation data. 15.The apparatus according to claim 10, wherein said digital filter haslow-pass filter characteristics.
 16. The apparatus according to claim10, wherein said digital filter includes a differential digital filterwhose coefficients are represented by differences between thecoefficients of an original filter shifted by an arbitrary tap length.17. The apparatus according to claim 16, wherein said generating meansincludes:calculating means for determining a first graph approximating avalue produced by supplying all available interpolation data tointerpolate said error portion of said digital signal to an arbitraryposition of said differential digital filter; calculating means fordetermining a second graph by substituting in said first graph a valueproduced by supplying data of said digital signal in which said errorportion is at an arbitrary position and from which the error portion isremoved to said differential digital filter; calculating means fordetermining a third graph approximating a value produced by supplyingall interpolation data which can be taken by said error portion to aposition of point symmetry of said differential digital filter at anarbitrary position of said differential digital filter; calculatingmeans for determining a fourth graph by substituting in said third grapha value produced by supplying said error portion of said digital signalto said differential digital filter at said arbitrary position;calculating means for deciding a value approximating a point ofintersection between said third graph and said fourth graph; andcalculating means for producing said interpolation data to correspond tosaid decided value.
 18. The apparatus according to claim 10, whereinsaid digital signal is a digital signal subjected to ΣΔ modulation. 19.An apparatus for interpolating a digital signal, comprising:generatingmeans for dividing said digital signal in a first predetermined numberof bits and dividing said digital signal into digital signals each of asecond predetermined number of bits, for determining a probability ofoccurrence of said divided digital signals, for providing aninterpolation table for interpolating the digital signal based on saidprobability of occurrence, and for generating interpolation data basedon said interpolation table when an error occurs in the supplied digitalsignal; and output means for replacing an error portion of said digitalsignal with said interpolation data from said generating means andoutputting an interpolated digital signal when an error occurs in saiddigital signal.
 20. The apparatus according to claim 19, wherein saidgenerating means further includes:extracting means for extracting asignal preceding said error portion of said digital signal when an erroroccurs in said digital signal and generating means for generatinginterpolation data from said interpolation table based on said signalpreceding said error portion of said digital signal extracted by saidextracting means.
 21. The apparatus according to claim 20, wherein saidextracting means further includes means for extracting respectivesignals preceding and following said error portion of said digitalsignal when an error occurs in said digital signal, and wherein saidgenerating means generates interpolation data from said interpolationtable based on said respective signals preceding and following saiderror portion of said digital signal extracted by said extracting means.22. The apparatus according to claim 20, wherein said extracting meansfurther includes means for holding said signal preceding said errorportion of said digital signal when an error occurs in said digitalsignal.
 23. The apparatus according to claim 21, wherein said extractingmeans further includes first and second holding means for holding saidrespective signals preceding and following said error portion of saiddigital signal when an error occurs in said digital signal.
 24. Theapparatus according to claim 19, wherein said generating means includesmemory means for storing said interpolation table.
 25. The apparatusaccording to claim 20, further including control means for supplying acontrol signal to said extracting means to hold said signal precedingsaid error portion of said digital signal and for supplying anothercontrol signal to said output means for switching said digital signal tosaid interpolated digital signal when an error occurs in said digitalsignal.
 26. The apparatus according to claim 19, wherein said generatingmeans includes a first interpolation table generated based on a firsttype of digital signal and a second interpolation table generated basedon a second type of digital signal, and wherein said generating meansincludes means for selecting said first interpolation table or saidsecond interpolation table based on said digital signal type to generatesaid interpolation data.
 27. The apparatus according to claim 19,wherein said generating means further includes:calculating means forcalculating a probability of occurrence of data based on said divideddigital signals when no error occurs in said digital signal; holdingmeans for generating and holding an interpolation table based on saidprobability of occurrence calculated by said calculating means; andmeans for generating interpolation data based on said interpolationtable held by said holding means and for supplying said interpolationdata to said output means when an error occurs in said digital signal.28. The apparatus according to claim 27, wherein said generating meansfurther includes;extracting means for extracting a signal preceding saiderror portion of said digital signal when an error occurs in saiddigital signal; and control means for controlling said holding means andsaid calculating means to generate an interpolation table when no erroroccurs in said digital signal, for supplying a control signal to saidextracting means to hold said signal preceding said error portion ofsaid digital signal, and for supplying another control signal to saidoutput means for switching said digital signal to said interpolateddigital signal when an error occurs in said digital signal.
 29. Theapparatus according to claim 19, further including delay means fordelaying and supplying said digital signal to said output means when noerror occurs in said digital signal.
 30. The apparatus according toclaim 19, wherein said digital signal is a digital signal subjected toΣΔ modulation.
 31. An apparatus for interpolating a digital signal,comprising:generating means for dividing said digital signal in a firstpredetermined number of bits and dividing said digital signal intodivided digital signals each of a second predetermined number of bits,for determining a probability of occurrence of said divided digitalsignals when no error occurs in the supplied digital signal, forproviding an interpolation table for interpolating said digital signalbased on said probability of occurrence, and for generatinginterpolation data based on said interpolation table when an erroroccurs in the supplied digital signal; and output means for replacing anerror portion of said digital signal with said interpolation data fromsaid generating means and outputting an interpolated digital signal whenan error occurs in said digital signal.
 32. The apparatus according toclaim 31, wherein said generating means further includes:detecting meansfor detecting a probability of occurrence of data based on said divideddigital signals when no error occurs in said digital signal; holdingmeans for generating and holding an interpolation table based on saidprobability of occurrence detected by said detecting means; and meansfor generating interpolation data based on said interpolation table heldby said holding means and for supplying said interpolation data to saidoutput means when an error occurs in said digital signal.
 33. Theapparatus according to claim 32, wherein said generating means furtherincludes:extracting means for extracting a signal preceding said errorportion of said digital signal when an error occurs in said digitalsignal; and control means for controlling said holding means and saiddetecting means to generate an interpolation table when no error occursin said digital signal, for supplying a control signal to saidextracting means to hold said signal preceding said error portion ofsaid digital signal, and for supplying another control signal to saidoutput means for switching said digital signal to said interpolateddigital signal when an error occurs in said digital signal.
 34. Theapparatus according to claim 31, wherein said digital signal is adigital signal subjected to ΣΔ modulation.
 35. A method of interpolatinga digital signal, comprising the steps of:dividing said digital signaldigitized in a first predetermined number of bits and dividing saiddigital signal into divided digital signals each of a secondpredetermined number of bits; determining a probability of occurrence ofsaid divided digital signals and generating an interpolation table forinterpolating said digital signal based on said probability ofoccurrence; and interpolating said digital signal based on saidinterpolation table when an error occurs in said digital signal.
 36. Themethod according to claim 35, further comprising the step of generatinginterpolation data for said interpolation table based on a signalpreceding an error portion of said digital signal when an error occursin said digital signal.
 37. The method according to claim 35, furthercomprising the step of generating interpolation data for saidinterpolation table based on respective signals preceding and followingan error portion of said digital signal when an error occurs in saiddigital signal.
 38. The method according to claim 35, further comprisingthe steps of:providing a first interpolation table generated based on afirst type of digital signal and a second interpolation table generatedbased on a second type of digital signal; and selectively using saidfirst interpolation table and said second interpolation table based onsaid digital signal type to generate said interpolation data.
 39. Themethod according to claim 35, further comprising the stepsof:calculating a probability of occurrence of data based on said divideddigital signals when no error occurs in said digital signal; andgenerating interpolation data based on a generated interpolation tabledata to said output means when an error occurs in the supplied from saidprobability of occurrence.
 40. The method according to claim 35, furthercomprising the step of modulating said digital signal accordance to ΣΔmodulation.
 41. An apparatus for recording and/or playing back arecording medium, comprising:converting means for converting an inputsignal into a digital signal digitized in a predetermined small numberof bits; head means for recording said digital signal converted by saidconverting means on said recording medium and reading said digitalsignal recorded on said recording medium; detecting means for detectingwhether an error occurred in said digital signal read by said headmeans; generating means for generating interpolation data and aninterpolation table based on data preceding an error portion of saiddigital signal when said error is detected by said detecting means; andoutput means for replacing said error portion of said digital signalread by said head means with said interpolation data generated by saidgenerating means and outputting an interpolated digital signal when anerror occurs in said digital signal.
 42. The apparatus according toclaim 41, wherein said generating means further comprises means fordividing said digital signal read by said head means into divideddigital signals each of predetermined number of bits, for determining aprobability of occurrence of said divided digital signals, for providingan interpolation table for interpolating said digital signal based onsaid probability of occurrence, and for generating interpolation databased on said interpolation table when an error occurs in said digitalsignal.
 43. The apparatus according to claim 41, wherein said convertingmeans includes ΣΔ modulation means for effecting ΣΔ modulation on saidinput signal.
 44. The apparatus according to claim 41, wherein saidgenerating means further includes:extracting means for extracting asignal preceding said error portion of said digital signal when an erroroccurs in said digital signal; and means for generating interpolationdata from said interpolation table based on a signal preceding saiderror portion of said supplied digital signal.
 45. The apparatusaccording to claim 44, further comprising control means for supplying acontrol signal to said extracting means to hold said signal precedingsaid error portion of said digital signal and for supplying anothercontrol signal to said output means for switching said digital signal tosaid interpolated digital signal when an error occurs in said digitalsignal.
 46. A method for recording and/or playing back a recordingmedium, comprising the steps of:converting an input signal into adigital signal digitized in a predetermined number of bits; recordingsaid digital signal on said recording medium and reading said digitalsignal recorded on said recording medium; detecting whether an erroroccurred in sad digital signal read from said recording medium;generating interpolation data and an interpolation table based on datapreceding an error portion of said digital signal when said error isdetected by said detecting step; and replacing said error portion ofsaid digital signal read from said recording medium with saidinterpolation data and outputting an interpolated digital signal when anerror occurs in said digital signal.
 47. The method according to claim46, further comprising the steps of:dividing said digital signal readfrom said recording medium into divided digital signals each of a secondpredetermined number of bits; determining a probability of occurrence ofsaid divided digital signals; generating an interpolation table forinterpolating said digital signal based on said probability ofoccurrence; and generating interpolation data based on saidinterpolation table when an error occurs in said digital signal.
 48. Themethod according to claim 46, further comprising the step of effectingΣΔ modulation on said input signal.